From 01a12fdad10b5995495e1a4236fdfb1a583979ab Mon Sep 17 00:00:00 2001 From: Joe Zhao Date: Fri, 16 May 2014 13:48:41 +0800 Subject: First Commit --- rs422lib/main.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 rs422lib/main.c (limited to 'rs422lib/main.c') diff --git a/rs422lib/main.c b/rs422lib/main.c new file mode 100644 index 0000000..8f6ec49 --- /dev/null +++ b/rs422lib/main.c @@ -0,0 +1,43 @@ + +#include"precomp.h" +#include"rsbus.h" +#include"sysctl.h" + +void port_init(void) +{ + P1DIR |= BIT0+BIT6; // P1.0 P1.6 output + P1OUT = 0; +} + +void received(unsigned char* str,int len) +{ + rsbus_w(0,str,len); +} + +void init_devices(void) +{ + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer + + if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF) + while(1)_BIS_SR(CPUOFF); // If calibration constants erased, trap CPU!! + + BCSCTL1 = CALBC1_16MHZ; // Set range + DCOCTL = CALDCO_16MHZ; // Set DCO step + modulation£¬DCO=8MHz + BCSCTL3 |= LFXT1S_2; // LFXT1 = VLO + IFG1 &= ~OFIFG; // Clear OSCFault flag + BCSCTL2 |= DIVS_2; // SMCLK = DCO/4 = 4MHz + + sysctl_init(); + port_init(); + rsbus_init(&received); + + _BIS_SR(GIE); +} + +void main(void) +{ + init_devices(); + while(1) + sysroutine(); +} + -- cgit v1.2.3-70-g09d2