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| author | Joe Zhao <ztuowen@gmail.com> | 2014-05-16 16:23:50 +0800 |
|---|---|---|
| committer | Joe Zhao <ztuowen@gmail.com> | 2014-05-16 16:23:50 +0800 |
| commit | d78e451d6bb81823c77d421e327a738bc54dc943 (patch) | |
| tree | e6c047fde65f1e026a3bc6b1d0f94ad797912164 /rs422lib/main.c | |
| parent | ca5fa5130115f16e0a5bcbc470cd0bb4b2265844 (diff) | |
| download | rsbus-d78e451d6bb81823c77d421e327a738bc54dc943.tar.gz rsbus-d78e451d6bb81823c77d421e327a738bc54dc943.tar.bz2 rsbus-d78e451d6bb81823c77d421e327a738bc54dc943.zip | |
Added Machine State
Diffstat (limited to 'rs422lib/main.c')
| -rw-r--r-- | rs422lib/main.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/rs422lib/main.c b/rs422lib/main.c index 8f6ec49..7f7ea11 100644 --- a/rs422lib/main.c +++ b/rs422lib/main.c @@ -3,6 +3,8 @@ #include"rsbus.h" #include"sysctl.h" +int cnt=0; + void port_init(void) { P1DIR |= BIT0+BIT6; // P1.0 P1.6 output @@ -14,6 +16,29 @@ void received(unsigned char* str,int len) rsbus_w(0,str,len); } +// Timer A0 interrupt service routine +#pragma vector=TIMER0_A0_VECTOR +__interrupt void Timer_A0 (void) +{ + ++cnt; + if (cnt==25) + { + STATE(0)=(STATE(0)+1)&0xFF; + cnt=0; + P1OUT^=BIT6; + } +} + +//TIMER A0 initialize - +// desired value: 5ms +void TimerA0_Init(void) +{ + // Configure TimerA0 + TA0CTL = TASSEL_2 + MC_1 +ID_3 ; // Source: SMCLK=4MHz, UP mode, DIV by 8 -> 0.5M + TA0CCR0 = 20000; // 0.5MHz / 20000 -> 25Hz -> 40ms + TA0CCTL0 = CCIE; // CCR0 interrupt enabled +} + void init_devices(void) { WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer @@ -29,6 +54,7 @@ void init_devices(void) sysctl_init(); port_init(); + TimerA0_Init(); rsbus_init(&received); _BIS_SR(GIE); |